layout versus schematics造句
例句与造句
- It is used for electronic circuit simulation and layout versus schematic ( LVS ) checks.
- E . g . the hard core in GDS II format is said to clean in DRC ( Design rule checking ), and LVS ( see Layout Versus Schematic ).
- In electronic design automation graph isomorphism is the basis of the Layout Versus Schematic ( LVS ) circuit design step, which is a verification whether the electric circuits represented by a circuit schematic and an integrated circuit layout are the same.
- Interconnect resistance is calculated by giving the extraction tool the following information : the top view layout of the design in the form of input polygons on a set of layers; a mapping to a set of devices and pins ( from a Layout Versus Schematic run ), and a cross sectional understanding of these layers including the resistivity of the layers.
- It's difficult to find layout versus schematics in a sentence. 用layout versus schematics造句挺难的